Spintronics Beyond MRAM: From Data Storage to Computing

Spintronics, once primarily associated with magnetic data storage and commercial MRAM, is now emerging as a platform for energy-efficient analog computation, probabilistic hardware, and physics-driven AI acceleration. This talk reframes spintronic devices not as passive memory elements but as active computational primitives.

 

We begin with the device-level ingredients, such as spin-orbit torque, interfacial anisotropy engineering, and thermal stochasticity, that underpin both MRAM and the next generation of spin-based compute devices. A key direction is the engineering of multilevel SOT-MRAM synapses, capable of stable, tunable conductance states with high on-chip density and inherently low leakage. These devices form the foundation of analog in-memory compute crossbars, designed to perform vector–matrix multiplication directly in the memory array with orders-of-magnitude energy savings.

 

At the architectural level, I will present our approach to large-scale analog MAC arrays (from 16×16 tiles toward 2k×2k arrays), including strategies for adaptive quantization, device variability compensation, and binary-tree routing. Our methodology allows pre-trained AI models to be mapped onto analog arrays without retraining, while maintaining accuracy within a few percent of digital baselines.

 

A complementary direction is probabilistic computing using stochastic MTJ devices (p-bits). By leveraging intrinsic thermal noise rather than suppressing it, these elements naturally implement hardware Boltzmann samplers and Ising-type inference engines. I will highlight how such devices can serve as quantum-inspired accelerators and integrate with analog crossbars for hybrid deterministic–stochastic computation.

 

The talk will also touch upon our experimental and theoretical works on broadband spin-torque rectification in MTJs, demonstrating GHz-range field-free detection relevant to sensory front-ends in embedded or edge-AI systems.

 

Overall, the emerging picture is a unified spintronic computing stack, from device physics to crossbar architectures and model-level adaptation, enabling efficient, off-grid AI inference and probabilistic computing. Spintronics, in this context, moves beyond its role in non-volatile memory and becomes a central technology for post-CMOS, physics-native computation.